Advanced RF technologies

Imec’s Advanced RF program explores the next generation of wireless networking. Our approach combines the benefits of silicon CMOS and III-V technologies, based on concrete system needs.

Stylized blue circuit board with glowing traces and layered chip packages representing wireless connectivity

Connectivity is more crucial than ever. As 5G rolls out, the industry already looks ahead to meet demands for faster data rates, lower energy consumption, and reduced latency.

By expanding the frequency spectrum above 6 GHz, larger bandwidths become available. The FR3 (Frequency Range 3) spectrum, ranging from 7-24 GHz, is gaining interest for its potential to balance capacity and coverage effectively.

Looking further, 6G will move to even higher frequencies: mmWave bands well above 100 GHz. This will enable new use cases that thrive on networks of diverse devices and new modes of human-machine interaction, such as:

  • Capturing and delivering true mixed reality (XR) that merges real and virtual worlds.
  • Exchanging large amounts of data for federated learning between AI systems, like in autonomous cars.

III-V Devices for Beyond 5G and 6G

These higher frequencies bring quite some challenges. The most important one being that silicon CMOS can no longer efficiently deliver the necessary performance, especially in critical front-end module (FEM) components like power amplifiers.

The solution comes from III-V semiconductors such as gallium nitride (GaN) and indium phosphide (InP). Their material properties enable them to outperform silicon CMOS, providing the required output power and efficiency at high operating frequencies.

Close-up of a 300 mm silicon wafer with repeated InP device dies
Zoom-in of a 300 mm silicon wafer showing dies with InP NRE HBT structures.

Imec’s Advanced RF program paves the way for high-performance, energy-efficient, scalable, and low-cost radio solutions by integrating GaN and InP into established CMOS processes. Our R&D spans two levels:

  • Device challenges: Bringing GaN and InP devices to 200- and 300mm silicon wafers, requiring novel manufacturing techniques,  new system and circuit design approaches, etc.
  • System challenges: co-integrating these GaN-on-Si- and InP-on-Si-based components, used for power amplifiers and possibly low-noise amplifiers and switches, with CMOS components for functions like frequency synthesis, up- and down-conversion,  calibration, control, and beamforming.

RF GaN-on-Si for beyond 5G

Unlike GaN-on-SiC, currently used for some high-frequency RF applications, GaN-on-Si is suitable for mass production on 200- or 300mm wafers. Imec leverages its experience with Gan-on-Si for power devices and optimizes this platform for RF use.

Longread: DC Reliability of high-κ GaN-on-Si MOS-HEMTs for mmWave power amplifiers

2025 press release: Imec achieves record-breaking RF GaN-on-Si transistor performance for high-efficiency 6G power amplifiers

Cross-section of GaN-on-Si transistor layers with source, drain, and gate fingers
Example of CMOS-compatible GaN-on-Si technology with 3-level Cu BEOL.

Some features of imec’s RF Gan-on-Si technology:

  • CMOS-compatible 200mm RF GaN-on-Si process
  • In-house MOCVD growth of RF buffer and active layers (AlGaN, InAlN)
  • HEMT and MISHEMT devices with Lg < 50nm and low resistive Ohmic contacts with Rc <0.15 Ω mm
  • Advanced multi-layer Cu BEOL & integration of passives

Our offering includes:

  • Device design and optimization to meet the performance and reliability requirements for Beyond-5G infrastructure and handset applications.
  • Modeling and advanced characterization for technology pathfinding, including reliability and thermal design.
  • Exploration of novel device architectures and engineered substrates.
  • RF GaN-Si R&D design platform for circuit exploration and technology customization.
  • FEM system and circuit design, including system-technology co-optimization and benchmarking with incumbent technologies.
  • Demonstrators displaying the advantages of RF GaN-on-Si.

Download leaflet for more details

RF InP-on-Si for 6G

For frequencies around and above 100 GHz, InP offers the best power-efficiency trade-off. However, its potential is limited as long as its fabrication depends on lab processes on small wafers.

Imec aims to make InP manufacturing processes CMOS-compatible. Three approaches are considered for integrating InP on silicon:

  1. Nano-ridge engineering: Selectively growing III/V material in pre-patterned trenches in silicon.
  2. Strain-relaxed buffers: Growing InP on layers deposited on silicon to compensate for the lattice mismatch between Si and InP.
  3. Wafer reconstruction: Using die-to-wafer bonding to attach tiles made from high-quality InP substrates to a silicon wafer.

Dive into this article for more details

Diagram showing three approaches for growing InP on silicon wafers, including wafer reconstruction and selective growth.

RF silicon interposer for heterogeneous integration of III-V with CMOS

Once the manufacturing of III-V devices is scaled up, further cost reduction is possible by limiting the use of these costly devices to areas where their performance is essential. Other parts of the system can then still be developed in silicon CMOS.

This chiplet approach stems from imec’s expertise in 3D integration. Technologies like scaled micro-bumps, high-aspect-ratio through-silicon vias (TSVs) and multi-layer Cu damascene routing enable heterogeneous integration through Si interposer technology, offering a smaller footprint and lower loss compared to advanced PCB technology.

2026 press release: Imec unlocks system-level III-V chiplet integration on Si-CMOS by advancing its 300mm RF silicon interposer platform with high-density MIMCAPs, passive modeling, and laser-assisted bonding

InP power amplifier chiplet mounted on an RF silicon interposer
InP power amplifier chiplet mounted on RF silicon interposer with 0.1 dB insertion loss at 140 GHz.

Some features of imec’s RF interposer technology:

  • Through-silicon vias (TSVs)
  • High-density digital interconnects
  • Thick RF polymer processing
  • Multi-layer redistribution layers
  • High-Q passives including resistors, inductors, MIM capacitors
  • Micro-bumping to Cu & Au BEOL of ICs
  • Improved thermal conductivity
  • 300mm fab compatible

Our offering includes:

  • RF Si interposer R&D developing new features (passives, TSV integration, wafer thinning, etc.) and exploring new materials.
  • System-technology co-optimization (STCO) for achieving optimal radio functionality partitioning and guiding device process technologies and packaging/interconnection approaches.
  • Modeling and advanced characterization for technology pathfinding, including reliability and thermal design.
  • RF interposer R&D platform for prototyping and technology customization.

Download leaflet for more details 

Want to partner with imec on beyond 5G and 6G?

  • Join the program to get early access to imec’s R&D results. Co-develop the next RF technologies through precompetitive, cost- and risk-shared research.
  • Enter into a bilateral development project to leverage imec’s technology and expertise to realize a prototype or technology demonstrator for your specific requirements.

Get in touch

Annotated microchip layout showing a 4-stage PA, integrated switch, and 4-stage LNA blocks on a wafer.
A 4-stage PA and LNA with integrated switch. Designed in 22nm CMOS with 12.5 dBm output power at 140 GHZ (reference).

Beyond 5G technology blogs

"It’s time to start imagining the kind of 6G we want"

Imec fellow Piet Wambacq shares his vision on where the next generation of cellular connectivity can take us. And on what we need to realize that future.

Read this blog post

"To reap the rewards of 6G, we need to start sowing the seeds now"

Michael Peeters, VP R&D connectivity at imec, explains why there is no time like the present to tackle some key technologies that will make or break 6G.

Read this blog post

"To boost 6G energy efficiency, we need models that can handle its complexities"

Margot Deruyck, FWO-Postdoctoral Fellow at WAVES, an imec research group at Ghent University, dives into the power consumption of next-gen wireless networks.

Read this blog post

 

Presentations, articles and press releases on beyond 5G technology

Scientific publications

Tang et al. “A 140 GHz T/R Front-End Module in 22 nm FD-SOI CMOS”, IEEE Radio Frequency Integrated Circuits Symposium (RFIC), (2021)

External link

Parvais et al. “GaN-on-Si mm-wave RF Devices Integrated in a 200mm CMOS Compatible 3-Level Cu BEOL”, IEEE International Electron Devices Meeting (IEDM), (2020)

External link

Vais et al. “First demonstration of III-V HBTs on 300 mm Si substrates using nano-ridge engineering”, IEEE International Electron Devices Meeting (IEDM), (2019)

External link

PhD and postdoc opportunities for beyond 5G technology

Do you (almost) have a master’s degree in electrical engineering, computer science, or another related field? Are you excited about the recent evolutions in beyond 5G?  And do you want to help change the world by making communication ubiquitous, sustainable intelligent and/or invisible? Then you should consider applying for a PhD or postdoc position at imec.

Explore our PhD and postdoc opportunities

Read more

Close-up of a semiconductor wafer with repeated chip layout patterns.

Imec unlocks system-level III-V chiplet integration on Si-CMOS by advancing its 300mm RF silicon interposer platform with high-density MIMCAPs, passive modeling, and laser-assisted bonding

11/06/2026
press release
Beyond 5G
Read more
Abstract blue and purple technology panels with circuit-like patterns and glowing layers

ITF Spain

03/11/2026
Barcelona, Spain

A new chapter for deep-tech innovation

View event
Microscope close-up of a GaN-on-Si transistor structure with curved dark contacts

Imec achieves record-breaking RF GaN-on-Si transistor performance for high-efficiency 6G power amplifiers

12/06/2025
press release
Beyond 5G

Improved contact resistance and RF output key toward mobile-compatible E-mode GaN-on-Si transistors

Read more
Abstract blue semiconductor chip tiles floating on a purple background

ITF USA 2026 at SEMICON® West

12/10/2026
San Francisco, USA

From silicon to systems: building the AI future The pace of AI evolution leaves little room for certainty. Yet, several trends are clear: AI agents increasingly collaborating in orchestrated ecosystems are on the rise. Physical AI is a crucial next step, including (humanoid) robots transforming our homes and workspaces. In parallel, AI – just like advances in quantum computing – could help unlock breakthroughs in fields such as physics and biology. Building the AI future starts with a solid hardware foundation – from high-performance, energy-efficient compute in the data centers to low-power, real-time inference at the edge. ITF USA at SEMICON® West presents the building blocks for shaping the AI future. On October 12 in San Francisco, we take stock of the full AI deep-tech stack: from silicon to systems, from research to manufacturing. Discover ITF USA

View event

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