Delta-Sigma modulator 84dB SNR, 250Hz BW
| Macro Name | Delta-Sigma modulator 84dB SNR, 250Hz BW | |
| Width (for Hard IP only) | 0.8mm | |
| Height (for Hard IP only) | 0.86mm | |
| Power | 3.6uW for the modulator | |
| Short Description*(max 128 characters) | This IP is an ultra-low power SD-modulator optimized for low bandwidth, ultra-low-power applications, including sensor readouts, healthcare solutions and IoT. It is a discrete-time second-order SD modulator with fully differential switched-capacitor circuits. The quantizer is a 5b SAR-ADC with passive adder. Chopper compensation is used to remove the first integrator non-idealities. The modulator requires only a single 32kHz reference clock and doesn’t rely on high-speed, high-power clocks. Reference designs for ADC driver, reference drivers and decimation filters are available. | |
| Primary* Category | Analog & Mixed Signal IP:A2D Converter | |
| Secondary Category | Analog & Mixed Signal IP:Oversampling Modulator | |
| Node | 180nm MixedMode CMOS | |
| Foundry | TSMC | |
| Process | 1P6M (1 poly, 6 metals) MM CMOS | |
| Portability* | ASIC | |
| Maturity* | Silicon proven on prototypes, hence only white-box license (no corner characterization performed for high volume production) | |
| IP Location * | core | |
| Market category | Consumer Electronics, Medical | |
| Overview | General overview of the IP | |
| Features 1 | SD-modulator in 180nm CMOS | |
| Features 2 | 1.2V supply | |
| Features 3 | 84dB SNR | |
| Features 4 | 3.6uW | |
| Features 5 | 250Hz BW | |
| Features 6 | 500fJ/conv | |
| Features 7 | Only requires 32.738kHz RTC clock | |
| Features 8 | 70dB SNDR | |
| Deliverables 1 | whitebox IP license (including matlab model) with technology transfer training and support |