How to pick the right packaging for your advanced node ASICs

29/01/2025

Advanced nodes are key for applications ranging from HPC and AI to fintech. Knowing which package to choose for these advanced custom chips is one of the keys to success.

From cost to performance to reliability, our experts Rick Lyons and Hans Manhaeve will explain the packaging landscape and the main factors to consider when making packaging decisions.

What you will learn

What packaging techniques work best for advanced node ASICs, from BGA to 2.5/3D
What factors to consider when selecting packaging
When to start designing your package

Speakers

Rick Lyons, Senior Business Development Manager

Rick Lyons, Senior Business Development Manager for IC-Link, is based in Boston with responsibility for Eastern North America. Rick holds a BSEE and has held Sales and Sales Management roles in companies focused on ASIC, FPGA and ASSP. His previous roles include sales and sales management positions at LSI Logic, Xilinx, Altera and ams-Osram.

Hans Manhaeve, ASIC Project Architect

Hans Manhaeve is one of the ASIC Project Architects of IC-Link’s Product Engineering division focusing on crafting ASIC packaging and testing solutions. Previously he acted as managing director (CEO) of Ridgetop Europe (formerly Q-Star Test) and as CTO of Ridgetop Group Inc. Before setting up Q-Star Test he was working as a Professor at a Belgian Technical University and was working at IMEC as a researcher.

He has Belgian BSc and MSc degrees in Electronics, Electronic Engineering and Microelectronics. He holds a PhD in electronic engineering from the University of Hull (UK), is member of IEEE/IEEE-CS, serves on various committees and as reviewer/guest-editor for many international events and magazines, is expert/reviewer serving the European Commission, published more than 100 papers, holds several patents and has a broad interest in ASIC Design, Packaging, Test, DFT, Test optimization, Reliability and Predictive Maintenance.