Arnita Podpod

Author

Arnita Podpod graduated with a master degree in Materials Science and Engineering, and with a bachelor degree in Applied Physics from University of the Philippines. After graduation, she started at NXP Semiconductors as a Project (Materials) and Process Engineer, and progressed to being a Senior Package Development Engineer with Fairchild Semiconductor Phils. Arnita joined imec in 2013 as a Senior R&D Engineer and is currently responsible for both Flip Chip on FO-WLP projects and Pre-Assembly module integration within the imec 3D program. 

Portrait of Arnita Podpod outdoors, wearing a light striped top.

Authored articles

Close-up of a wafer covered with evenly spaced square semiconductor dies for packaging

Temporary bonding and mold process to enable next-gen fan-out wafer-level packaging

07/04/2020
3D integration
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